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Evolvable Hardware is a technique derived from evolutionary computation applied to a hardware design. In evolutionary computing, a configured bit is considered as a human chromosome for a genetic algorithm, which has to be downloaded into hardware. This research was able to manually evolve two simple electronic circuits of NAND and NOR gates in simulation. This research focuses on the following: To automate the simulation by using In Circuit Debugging Emulators (IDEs), and To develop a strategy of configuring hardware like an FPGA without the use of their company supplied in circuit debugging emulators, so that the evolution of an intrinsic evolvable hardware could be controlled, and is hardware independent. As mentioned, the research conducted here was able to develop an evolvable hardware friendly Generic Structure which could be used for the development of evolvable hardware. The structure developed was hardware independent and was able to run on various FPGA hardware s for the purpose of intrinsic evolution. The structure developed used few configuration bits as compared to current evolvable hardware designs.

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