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Through Silicon Via (TSV) is a key technology for realizing three-dimensional integrated circuits (3D ICs) for future high-performance and low-power systems with small form factors. This book covers both qualitative and quantitative approaches to give insights of modeling TSV in a various viewpoints such as signal integrity, power integrity and thermal integrity. Most of the analysis in this book includes simulations, numerical modelings and measurements for verification. The author and co-authors in each chapter have studied deep into TSV for many years and the accumulated technical know-hows and tips for related subjects are comprehensively covered.

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Preface.

Chapter 1 Introduction. 1.1 TSV-based 3D ICs. 1.2 Core Technologies and Electrical Reliability Design for TSV-based 3D IC. 1.3 Electrical Analysis of TSVs based on MIS Analysis. References.

Chapter 2 Electrical Modeling of a Through-Silicon Via (TSV). 2.1 Introduction. 2.2 Equivalent Circuit Model of a TSV. 2.3 Electrical Characterization and Analysis of a TSV Channel. 2.4 Electrical Analysis of a Single-ended and Differential Signal TSV Channel. 2.5 Summary. References.

Chapter 3 High-speed TSV-based Channel Modeling and Design. 3.1 Introduction. 3.2 Model of High-speed TSV-based Channel. 3.3 Analysis of High-speed TSV-based Channel. 3.4 Worst-case Eye-diagram Estimation Algorithm. 3.5 Summary. References.

Chapter 4 Noise Coupling and Shielding in 3D ICs. 4.1 Overview. 4.2 Analysis of Noise Coupling in 3D ICs. 4.3 Analysis of Shielding Structures in 3D-IC. 4.4 Summary. References.

Chapter 5 Thermal Effects on TSV Signal Integrity. 5.1 Overview. 5.2 Temperature-dependent TSV Isolation Characteristics and Model. 5.3 Temperature-dependent TSV Channel. 5.4 Summary. References.

Chapter 6 Power Distribution Network (PDN) Modeling and Analysis for TSV and Interposer-based 3D-ICs in the Frequency Domain. 6.1 Introduction. 6.2 Modeling of PDNs in TSV-based 3D-ICs. 6.3 Analysis of the PDN Impedance in TSV-based 3D-ICs in the Frequency Domain. 6.4 Summary. References.

Chapter 7 TSV Decoupling Schemes. 7.1 Introduction. 7.2 Decoupling Capacitor Schemes. 7.3 Application and Design of TSV-based Decoupling Schemes. 7.4 Summary. References.

Index.

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