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"Design of Experimental Soft-Core Processors Using VHDL" presents the design and implementation of simple processor cores for experimental and teaching purposes. It has two main objectives: first - to explain the design process through working examples of processor cores, considered easy to understand; and second - to demonstrate how VHDL could be used in modeling of such cores. After providing a brief overview of VHDL modeling styles and introducing the development flow, the reader is guided through the design process of simplified processor cores for the three basic architecture types - accumulator, stack and register. These cores form a basis for several modifications and experiments presented later: extension of the instruction set, support for subroutines, implementation of interrupt processing mechanism, bi-processor system design, performance comparison, and creation of a simple two-pass assembler. The appendices contain the complete VHDL code for the projects and the source code for the assembler. The material is intended to be of interest to students in computer engineering, beginners in computer design and possibly to anyone who is inspired to build their own processor.

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Kostadinov, Nikolay
Nikolay Kostadinov is a lecturer in the Department of Computer Systems and Technologies at the University of Ruse, Bulgaria. His interests include digital systems design, real-time systems, and VoIP technologies.

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