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This work is a simple yet insightful application of VHDL prototyping in a hardware design project using the Xilinx Virtex-5 FPGA. A Smart Antenna System calculates the Direction of Arrival (DOA) of incoming receiver signals by implementing certain protocols or algorithms. Implementation of the protocols is executed on a Field Programmable Gate Array (FPGA) platform or a custom Digital Signal Processor (DSP). The FPGA or DSP system performs operations on the incoming input signal at the smart antenna receiver. The result of this process is transferred to the component of the system called the Beamformer. The Beamformer is the control logic that aligns the transmitter in the DOA based on these inputs. A UART communication channel has been designed on the FPGA to provide data path and control logic between the receiving port and Beamformer of a Smart Antenna DOA system. This project also features a debugging system that enables the user to have access to a LabView GUI. The GUI reads and displays information about the data being sent and received over the UART Channel, helping the user to troubleshoot and analyze the system.

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Born in 1984, Manipur, India. BE, Electronics from Anna University, Chennai, May 2007. Software Engineer at Infosys Technologies Ltd, 2007-08. MS, Electrical Engineering from Montana State University, Bozeman, May 2010. Presently serves as a Business Analyst at a major healthcare company in Maryland,USA. Enjoys classic rock

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