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Joseph C. Bernier, Gregg D. Croft, James E. Vinson (Beteiligte)

ESD Design and Analysis Handbook


Softcover reprint of the original 1st ed. 2003. 2012. ix, 207 S. IX, 207 p. 235 mm
Verlag/Jahr: SPRINGER, BERLIN 2012
ISBN: 1-461-35019-0 (1461350190)
Neue ISBN: 978-1-461-35019-4 (9781461350194)

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Electrostatic Discharge is a pervasive issue in the semiconductor industry affecting both manufacturers and users of semiconductors. This easy-to-read, practical handbook presents an overview of ESD as it effects electronic circuits and provides a concise introduction for students, engineers, circuit designers and failure analysts.
Foreword. 1: Physics and Models of an ESD Event. 1.1. ESD in our World. 1.2. ESD in Semiconductors. 1.3. The ESD Event. 1.4. Degradation and Latency. 1.5. Topical Reference List. 2: Failure Analysis Techniques. 2.1. Overview of Failure Analysis. 2.2. Failure Analysis Objectives. 2.3. Failure Site Identification. 2.4. Root Cause and Corrective Action. 2.5. Topical Reference List. 3: Environmental Protection. 3.1. Environmental Philosophy. 3.2. Room Level Controls. 3.3. Work Area Controls. 3.4. Personal Controls. 3.5. Packaging and Storage. 3.6. Handling Equipment. 3.7. Auditing. 3.8. Topical Reference List. 4 : Chip Level Protection. 4.1. Protection Approach. 4.2. Off Chip Protection. 4.3. On-Chip Protection. 4.4. Topical Reference List. 5: Device Characterization. 5.1. Circuit Element Sensitivity. 5.2. TLP Testing. 5.3. Characterization Matrix. 5.4. Topical Reference List. 6: ESD Modeling. 6.1. Circuit Modeling. 6.2. Device Modeling. 6.3. Topical Reference List. Index