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Smart AD and DA Converters investigates the feasibility of relevant converter concepts to improve performance overall. A braod range of trends and challenges in data converter design are studied, while a generalized view of smart conversion is introduced.

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The history of the application of semiconductors for controlling currents goes back all the way to 1926, in which Julius Lilienfeld led a patent for a "Method and apparatus for controlling electric currents" [1], which is considered the rst work on metal/semiconductor eld-effect transistors. More well-known is the work of William Shockley, John Bardeen and Walter Brattain in the 1940s [2, 3], after which the development of semiconductor devices commenced. In 1958, independent work from Jack Kilby and Robert Noyce ledto the invention of integrated circuits. A few milestones in IC design are the rst monolithic operational ampli er in 1963 (Fairchild?A702, Bob Widlar) and the rst o- chip 4-bit microprocessor in 1971 (Intel 4004). Ever since the start of the semiconductor history, integration plays an imp- tant role: starting from single devices, ICs with basic functions were developed (e. g. opamps, logic gates), followed by ICs that integrate larger parts of a s- tem (e. g. microprocessors, radio tuners, audio ampli ers). Following this trend of system integration, this eventually leads to the integration of analog and d- ital components in one chip, resulting in mixed-signal ICs: digital components are required because signal processing is preferably done in the digital - main; analog components are required because physical signals are analog by nature. Mixed-signal ICs are already widespread in many applications (e. g. - dio, video); for the future, it is expected that this trend will continue, leading to a larger scale of integration.

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List of symbols and abbreviations.
1. INTRODUCTION.
2. AD AND DA CONVERSION. 1 Introduction. 2 Trends in applications. 3 Trends in technology. 4 Trends in system design. 5 Performance criteria. 6 Conclusion.
3. SMART CONVERSION. 1 Introduction. 2 Smart concept. 3 Application of the smart concept. 4 Focus in this work. 5 Conclusion.
4. SMART DA CONVERSION. 1 Introduction. 2 Area of current-steering DACs. 3 Correction of mismatch errors. 4 Sub-binary variable-radix DAC. 5 Design example. 6 Conclusion.
5. DESIGN OF A SUB-BINARY VARIABLE-RADIX DAC. 1 Schematic design. 2 Layout. 3 Self-measurement-circuit implementation. 4 Experimental results. 5 Conclusion.
6. SMART AD CONVERSION. 1 Introduction. 2 Literature review. 3 High-speed high-resolution AD conversion. 4 Smart calibration. 5 Conclusion.
7. DESIGN OF AN OPEN-LOOP T&H CIRCUIT. 1 Literature review. 2 Design goal. 3 T&H architecture. 4 Sampling core architecture. 5 Output buffer architecture. 6 T&H design. 7 Experimental results. 8 Conclusion.
8. T&H CALIBRATION. 1 Introduction. 2 T&H accuracy. 3 T&H calibration method. 4 Analog correction parameters. 5 Digitally assisted analog correction. 6 Simulation results. 7 Implementation of the calibration method and layout. 8 Experimental results. 9 Conclusion.
9. T&H CALIBRATION FOR TIME-INTERLEAVED ADCS. 1 Introduction. 2 Channel matching in time-interleaved T&H´s. 3 Channel mismatch calibration. 4 Channel mismatch detection. 5 Channel mismatch correction. 6 Simulation results. 7 Implementation of the calibration method and layout. 8 Experimental results. 9 Conclusion.
10. CONCLUSIONS.
References. Index.

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