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Amit Pande, Joseph Zambreno
(Beteiligte)
Embedded Multimedia Security Systems
Algorithms and Architectures
2013. 2014. xviii, 146 S. 57 SW-Abb.,. 235 mm
Verlag/Jahr: SPRINGER, BERLIN; SPRINGER, LONDON; SPRINGER 2014
ISBN: 1-447-15918-7 (1447159187)
Neue ISBN: 978-1-447-15918-6 (9781447159186)
Preis und Lieferzeit: Bitte klicken
Opening with a detailed review of techniques for selective encryption, this book examines algorithms that combine encryption and compression. Presents a selection of specific examples of the design and implementation of secure embedded multimedia systems.
Opening with a detailed review of existing techniques for selective encryption, this text then examines algorithms that combine both encryption and compression. The book also presents a selection of specific examples of the design and implementation of secure embedded multimedia systems. Features: reviews the historical developments and latest techniques in multimedia compression and encryption; discusses an approach to reduce the computational cost of multimedia encryption, while preserving the properties of compressed video; introduces a polymorphic wavelet architecture that can make dynamic resource allocation decisions according to the application requirements; proposes a light-weight multimedia encryption strategy based on a modified discrete wavelet transform; describes a reconfigurable hardware implementation of a chaotic filter bank scheme with enhanced security features; presents an encryption scheme for image and video data based on chaotic arithmetic coding.
Part I: Multimedia Systems
Introduction
Advances in Multimedia Encryption
Securing Multimedia Content using Joint Compression and Encryption
Part II: Examples
Polymorphic Wavelet Transform
The Secure Wavelet Transform
Chaotic Filter Banks
Chaotic Arithmetic Coding
Conclusion
Dr. Amit Pande is an NSF Computing Innovation Fellow at the Department of Computer Science of the University of California, Davis, USA. Dr. Joseph Zambreno is an Associate Professor and Co-Director of the Reconfigurable Computing Lab at Iowa State University, Ames, USA.