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Gabriela Nicolescu, Ian O´Connor
(Beteiligte)
Integrated Optical Interconnect Architectures for Embedded Systems
Herausgegeben von O´Connor, Ian; Nicolescu, Gabriela
2013. 2014. xii, 272 S. 8 Tabellen. 235 mm
Verlag/Jahr: SPRINGER, BERLIN; SPRINGER NEW YORK; SPRINGER 2014
ISBN: 1-489-99204-9 (1489992049)
Neue ISBN: 978-1-489-99204-8 (9781489992048)
Preis und Lieferzeit: Bitte klicken
This book highlights current research in optical interconnect technologies and architectures. Particular emphasis is given to the ways photonic components are assembled into architectures to address the needs of data-intensive on-chip communication.
This book provides a broad overview of current research in optical interconnect technologies and architectures. Introductory chapters on high-performance computing and the associated issues in conventional interconnect architectures, and on the fundamental building blocks for integrated optical interconnect, provide the foundations for the bulk of the book which brings together leading experts in the field of optical interconnect architectures for data communication. Particular emphasis is given to the ways in which the photonic components are assembled into architectures to address the needs of data-intensive on-chip communication, and to the performance evaluation of such architectures for specific applications.
Preface.- Basics for high-performance computing and optical interconnect.- Interconnect issues in high-performance computing architectures.- Technologies and building blocks for on-chip optical interconnects.- On-chip optical communication topologies.- Designing chip-level nanophotonic interconnection networks.- FONOC: a Fat-Tree based optical network-on-chip for multiprocessor system-on-chip.- On-chip optical ring bus communication architecture for heterogeneous MPSoC.- System integration and optical-enhanced MPSoC performance.- A protocol stack architecture for optical network-on-chip: Organization and performance evaluation.- Reconfigurable photonic networks on chip.- System Level Exploration for the Integration of Optical Networks on Chip in 3D MPSoC Architectures.