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Currently, multiprocessors and multi-cores are very complex and heterogeneous systems with parallelism exploited at processes level. The trend seems that the number of cores per chip is expected to double every two years - the idea is to substitute few complex and power-consuming CPUs with many smaller and simpler CPUs that can deliver better performance per watt. Such architectures can be exploited efficiently pro- vided that applications are able to do it. In order to do so a methodological and structured approach is needed to keep low the complexity of the resolution. On one hand, structured parallel programming is used in order to create parallel applications independent of the underline architecture. On the other hand, a cost model in association with an abstract architecture is needed from the performance prediction point of view. This book is a contribution on that approach enhancing the cost models for shared memory architectures and its accuracy with particular care to parallel application constraints.

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Alberto Bandettini, Computer Scientist. He is the first graduate with honors in Computer Science and Networking at the center of excellence Scuola Superiore Sant Anna and University of Pisa, Italy. Member of international organizations like GlobaPlatform and AIESEC, he is currently a technical expert in the mobile payments field at Rogers, Canada.

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