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In recent years, the complexity of power systems and hardware interfaces have been growing, making Hardware-In-the-Loop (HIL) simulation more difficult for systems with different data exchange methods. One of the challenges in simulating complex power systems is to guarantee faultless communication and high data throughput between components. Focus of research in this work is the concept of expanding the data exchange capabilities for the Real Time Digital Simulator (RTDS), because extensive simulation studies are of great importance. The theoretical aspects of powerful new interfacing technologies of the RTDS to external equipment for HIL simulations are worked out and an implementation for the selected Aurora 8B/10B protocol on a Field Programmable Gate Array (FPGA) is shown.

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Ing. Andreas Berger MSc, born in Bavaria (Germany) in 1987, studied Automation Engineering at the Upper Austrian University of Applied Sciences, Austria. Research for this work was done in 2013 at the Center for Advanced Power Systems(CAPS) at Florida State University(FSU), USA. Since 2014 business owner and founder of the Bembu GmbH, Austria.

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