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This monograph is the second part in a series of three publications. The first part is entitled "Designing Logic Gates for Mechanical Engineers. Part I. Boolean Algebra and Combinational Logic", and the third part - "Designing Logic Gates for Mechanical Engineers. Part III. Design problems". The monograph was written based on the author´s experience of teaching a digital technology course to students of the Faculty of Technical Sciences of the University of Warmia and Mazury in Olsztyn who were pursuing degrees in mechanical engineering and machine design, power engineering, agricultural and forestry engineering, and mechatronics. The above fields are not related to electronics. Monographs dealing with digital technology are usually written by electronics or IT engineers for electronics or IT engineers, and most of them do not address the needs or interests of mechanical engineers. This monograph was written in a simple language to facilitate the coursework for students pursuing a university degree in evening and weekend programs.

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Zenon Syroka, PhD., Eng. is employed at the Department of Electrical, Power, Electronic and Control Engineering, University of Warmia and Mazury in Olsztyn (Poland). He has graduated from the Military University of Technology in Warsaw (Faculty of Electronics) and the Nicolaus Copernicus University in Torun (Faculty of Mathematics)

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